D-link DWL-900AP+ rev.C Hardware Overview

Wednesday, 19 January 2005 από Acinonyx

Hardware

  • Mainboard
    • GL2422AP-1T1-B0
      • v1.1
      • v1.2
  • PSU
    • AIC1563CN
      • Input voltage: Up to 30V
      • Output voltage: 3.3Vdc
      • Output current
        • Peak: 2A
        • Continuous: 1.5A
  • CPU
    • Conexant CX82100-4X
      • Core: ARM940T (ARM9TDMI)
      • Max Clock Speed: 168MHz
      • Unused peripherals
        • USB1.1
        • 1 x MII ethernet controllers
  • Flash memory
    • M29W800DB
      • Capacity: 8Mbits = 1Mbyte
      • 100,000 write/erase cycles
  • SDRAM
    • IC42S16400-7T
    • Capacity: 64Mbits = 8Mbytes
    • Max Clock Speed: 133MHz
  • PLD
    • EPM3032A
      • CMOS EEPROM-based
      • Interfaces with a hex inverter (AHC74)
  • miniPCI slot
    • Probably miniPCI v1.0 compliant slot
    • Wireless miniPCI: GL2422MP-MT2
  • Ethernet Physical Transceiver
    • KS8721B
      • Auto-negotiation
      • 100BaseTX/FX
      • 10BaseT
      • Full/Half duplex
  • JTAG connectors
    • 14-pin (Embedded Ice compatible) for ARM9
    • 10-pin for Altera PLD
  • Serial interface
    • not installed

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DWL-900AP+ rev.C Modified firmware

Saturday, 8 January 2005 από Acinonyx

Improvements

  • Antenna selection remains the same for both RX and TX
  • More TX power control settings (0 – 18dbm)
  • Power control works on all modes
  • Additional channels (12, 13 and 14)
  • Better web interface

Screenshots

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